Radeon 9800 Pro

With the advent of nv30 from a competitor, the Canadian company ATI Technologies went on the attack again and also announced a whole line of a new generation of video accelerators.

Features with which the RADEON 9800 PRO was announced:

Production technology: 0.15 microns;
Number of transistors: 115 million;
Core Clock: 380 MHz;
Memory bus: 256 bit DDR (later, possibly DDR II);
Maximum local memory: 256 MB;
Memory clock: 340 DDR (680) MHz, bandwidth about 24 Gb/s;
Interface bus: AGP 8x, bandwidth 2 Gb/s;
Full support for the main features of DX9:
Floating 64 and 128 bit data formats for textures (including volume and cube textures) and frame buffer (vectors of 4 F16 or F32 components);
Pixel pipelines with floating arithmetic (calculation format F24[4] or F24[3+1]);
Pixel shaders version 2.0;
Four independent vertex pipelines;
Vertex shaders version 2.0;
Hardware tessellation N-Patches with displacement maps (Displacement Mapping) and, optionally, an adaptive level of detail;
The new F-buffer technology makes it possible to execute pixel shaders of almost unlimited length.
Eight independent pixel pipelines
Eight texture units (one per pixel pipeline) capable of performing trilinear filtering without loss of speed, as well as combining anisotropic filtering with trilinear.
Four-channel (4 channels, 64 bits each) memory controller connected to the accelerator core and AGP "each-to-each" switch;
HyperZ III+ Memory Bandwidth Saving Technology (Fast clearing and compression of the depth buffer based on 8x8 blocks, hierarchical Z-buffer for fast visibility detection);
Additional optimizations for speedy performance of the two-way pattern buffer.
Early Z-test (pixel shader is performed only for visible pixels);
Hardware acceleration of MPEG 1/2 decompression and compression, the ability to randomly process a video stream using pixel shaders (VIDEOSHADER technology);
Two independent CRTCs;
Two built-in 10-bit 400 MHz RAMDAC with hardware gamma correction;
Built-in TV Out;
Built-in DVI (TDMS transmitter) interface, resolution up to 2043*1536.
Built-in general purpose digital interface for connecting an external RAMDAC or DVI transmitter, as well as for interfacing with a TV tuner.
FC package (FlipChip - with an inverted open crystal).

So, the characteristics are very close to the previous flagship - R300. The main hardware differences were in two areas - performance optimization with a two-sided template buffer - which gave an increase in games based on the DOOM III engine and the like, which intensively use dynamic shadows based on the template buffer, and the presence of special logic in pixel processors.

This additional feature made it possible to store in the accelerator's local memory not only the final color values ​​calculated by the pixel shader, but also the intermediate values ​​of the parameters that appear during the calculation. This approach is called an F-buffer and requires relatively simple hardware support in the chip (recording and restoring the parameter stream) and a special compiler.

Of course, this technology was aimed primarily at realistic graphics and DCC - until the full development of the capabilities of even standard pixel shaders 2.0 limited to 64 computational commands.

With the release of this chip, ATI further consolidated its superiority in terms of performance in games and applications.

Rainbow Six 3: Raven Shield